MIT Demonstrates First Vertical Gallium Nitride Diodes on Silicon

Gallium Nitride (GaN) is being developed for power electronics applications in both vertical and lateral structures. Although the lateral structure has been studied widely, it faces reliability and integration issues. Vertical structures have been realized more recently, but on high-cost small-diameter substrates such as free-standing GaN, silicon carbide (SiC) or sapphire. Potential advantages of vertical electronic structures include smaller chip sizes, better electric field profile with the peak away from the surface, and superior thermal characteristics.

The challenge for growth of GaN structures on silicon is to reduce dislocation densities resulting from the larger lattice mismatch compared with the alternative substrates.

The researchers developed two technologies to reduce leakage currents. First, a deep inductively coupled plasma reactive-ion etch for GaN, using chlorine/boron trichloride/argon plasma and a metal hard mask. The researchers write: “Under high ion bombardment energies, the use of metal hard mask could eliminate the erosion of mask edge usually observed when using traditional oxide hard mask, and therefore leads to a smoother vertical sidewall and a reduction in sidewall parasitic leakage current.”

The second technology was the silicon nitride passivation applied using a sputtering process with an optimized pre-clean. The passivation managed "to effectively reduce the dielectric/GaN interface leakage widely reported for traditional passivation using plasma-enhanced chemical vapor deposition (PECVD) systems."

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